Wafer level packaging has been applied to VTI's sensors
by Heikki KuismaWLP on a MEMS-wafer
VTI has successfully applied standard WLP redistribution and bumping technology to a capped MEMS wafer. The next step will be to assemble ICs on the MEMS wafer. Later, several ICs will be stacked on MEMS: the sensor front end, MCU and radio chip on separate dies. This is the way to future intelligent, wireless sensors.
Figure: Standard WLP: polymer isolation, redistribution layers and contact bumps have been successfully applied to VTI's capped MEMS wafers.
Capping technology enables WLP
The enabler for applying WLP for MEMS is VTI's unique 3D-MEMS capping technology. Vertical silicon feed-throughs bring electrical contact from the top surface to the underlying MEMS. The top surface is fully planar so that further wafer level process steps can be applied after capping.
VTI have created a glass-silicon capping wafer technology that provides a large number of feed-throughs with very low parasitic capacitance, a high isolation resistance and a reasonably low contact resistance. It has been in full scale production of single and three axis accelerometers and pressure sensors for several years and has been used in many prototype and R&D sensors and other devices, including silicon resonators.
Figure: A capping wafer wiht planar surface and multiple feed-throughs is a pre-requisite for WLP of MEMS. 14 isolated feed-throughs on a 7.8mm2 device have been demonstrated in VTI.